The TimeLine’s delay algorithms are computationally complex, and require the full capability of the SHARC processor to run. This presents a challenge regarding spillover, in that an additional processor would be required to run two simultaneous algorithms.
TimeLine enables spillover by recording the wet signal and playing it back when a new patch is selected. When a new patch is selected, the wet signal from the first patch is ‘looped’ at the first patch’s delay time interval, and played back while reducing in level based on the repeats value. In addition, the spillover signal is ramped down over a time period of 4 seconds. By ‘looping’ the wet signal, spillover can occur without the requirement of two simultaneous processors needed to run two algorithms.
When changing patches, the spillover delay needs to complete its fade-out before the spillover buffer can start recording the new patch’s wet signal. This means that switching patches quicker than 4 seconds will result in no spillover.
If the Repeats are set to zero, there will be no spillover signal as the spillover signal is multiplied by the Repeats level. Remember, the dry signal isn’t being recorded because that would require an additional processor to produce simultaneous spillover with the new selected patch.